1 LTC1694-1 sn16941 16941fs smbus/i 2 c accelerator n improves smbus/i 2 c tm rise time transition n ensures data integrity with multiple devices on the smbus/i 2 c n improves low state noise margin n wide supply voltage range: 2.7v to 6v n tiny 5-pin sot-23 package n parallel multiple LTC1694-1 devices for increased drive the ltc ? 1694-1 is a dual smbus active pull-up designed to enhance data transmission speed and reliability under all specified smbus loading conditions. the LTC1694-1 is also compatible with the philips i 2 c bus. the LTC1694-1 allows multiple device connections or a longer, more capacitive interconnect, without compro- mising slew rates or bus performance, by supplying a high pull-up current of 2.2ma to slew the smbus or i 2 c lines during positive bus transitions during negative transitions or steady dc levels, the LTC1694-1 sources zero current. external resistors, one on each bus line, trigger the LTC1694-1 during positive bus transitions and set the pull-down current level. these resistors determine the slew rate during negative bus transitions and the logic low dc level. the LTC1694-1 is available in a 5-pin sot-23 package. n notebook and palmtop computers n portable instruments n battery chargers n industrial control application n tv/video products n acpi smbus interface , ltc and lt are registered trademarks of linear technology corporation. i 2 c is a trademark of philips electronics n.v. v cc = 5v 1 m s/div 1694-1 ta02 c ld = 200pf f smbus = 100khz comparison of smbus waveforms for the LTC1694-1 vs resistor pull-up LTC1694-1 1v/div r pull-up = 15.8k LTC1694-1: patent pending LTC1694-1 v cc gnd v cc 5v c1 0.1 f smbus1 smbus2 1 2 5 4 scl sda device 1 clk in clk out smbus v cc 5v data in data out device n 1694-1 ta01 clk in r p2 clk out data in data out r p1 descriptio u features applicatio s u typical applicatio u
2 LTC1694-1 sn16941 16941fs absolute m axi m u m ratings w ww u package/order i n for m atio n w u u order part number LTC1694-1cs5 LTC1694-1is5 (note 1) supply voltage (v cc ) ................................................. 7v smbus1, smbus2 inputs ............ C 0.3v to (v cc + 0.3v) operating ambient temperature range LTC1694-1c ........................................... 0 c to 70 c LTC1694-1i ....................................... C 40 c to 85 c junction temperature ........................................... 125 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec.)................. 300 c v cc 1 gnd 2 nc 3 5 smbus1 4 smbus2 top view s5 package 5-lead plastic sot-23 t jmax = 125 c, q ja = 256 c/ w consult factory for industrial and military grade parts. lthe lta9 s5 part marking electrical characteristics the l denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 2.7v to 6v, unless otherwise noted. symbol parameter conditions min typ max units v cc supply voltage range 2.7 6 v i cc supply current smbus1 = smbus2 = v cc l 15 45 80 m a i pull-up pull-up current positive transition on smbus ( figure 1) l 1.0 2.2 ma slew rate = 0.5v/ m s, smbus > v thres v thres input threshold voltage slew rate = 0.5v/ m s (figure 1) l 0.4 0.65 0.9 v sr thres slew rate detector threshold smbus > v thres l 0.2 0.5 v/ m s t r smbus rise time bus capacitance = 200pf (note 2) l 0.32 1.0 m s standard mode i 2 c bus rise time bus capacitance = 400pf (note 3) l 0.30 1.0 m s f max smbus maximum operating frequency (note 4) l 100 khz note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: the rise time of an smbus line is calculated from (v il(max) C 0.15v) to (v ih(min) + 0.15v) or 0.65v to 2.25v. this parameter is guaranteed by design and not tested. with a minimum initial slew rate of 0.5v/ m s, a minimum pull-up current of 1ma and a maximum input threshold voltage of 0.9v: rise time = [(0.9v C 0.65v)/0.5v/ m s] + [(2.25v C 0.9v) ? 200pf/1ma] = 0.77 m s note 3: the rise time of an i 2 c bus line is calculated from v il(max) to v ih(min) or 1.5v to 3v (with v cc = 5v). this parameter is guaranteed by design and not tested. with a minimum boosted pull-up current of 1ma: rise time = (3v C 1.5v) ? 400pf/1ma = 0.6 m s note 4: this parameter is guaranteed by design and not tested.
3 LTC1694-1 sn16941 16941fs typical perfor m a n ce characteristics u w temperature ( c) ?0 pull-up current (ma) 3.50 3.25 3.00 2.75 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0 50 75 1694-1 g01 ?5 25 100 125 v cc = 6v v cc = 5v v cc = 2.7v pull-up current vs smbus voltage temperature ( c) ?0 input threshold voltage (v) 0.90 0.85 0.80 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40 0 50 75 1694 g03 ?5 25 100 125 v cc = 6v v cc = 2.7v v cc = 5v temperature ( c) ?0 slew rate detector threshold (v/ s) 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 0 50 75 1694 g04 ?5 25 100 125 v cc = 6v v cc = 2.7v v cc = 5v slew rate detector threshold standby mode supply current temperature ( c) ?0 supply current ( a) 100 1694-1 g05 050 80 70 60 50 40 30 20 10 25 25 75 125 v cc = 6v v cc = 2.7v v cc = 5v pull-up current smbus voltage (v) 0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 35 lt 1694 g02 12 467 pull-up current (ma) v cc = 6v v cc = 5v v cc = 2.7v input threshold voltage
4 LTC1694-1 sn16941 16941fs pi n fu n ctio n s uuu v cc (pin 1): power supply input. v cc can range from 2.7v to 6v and requires a 0.1 m f bypass capacitor to gnd. supply current is typically 45 m a when the smbus or i 2 c lines are inactive (scl and sda are a logic high level). gnd (pin 2): ground. nc (pin 3): no connection. smbus2 (pin 4): active pull-up for smbus. smbus1 (pin 5): active pull-up for smbus. block diagra m w + slew rate detector control logic 0.65v v ref voltage comp 2.2ma channel one channel two (duplicate of channel one) 1694-1 bd 1 v cc 5 smbus1 smbus2 2 gnd 4 test circuits figure 1 LTC1694-1 v cc gnd v cc 5v c1 0.1 f smbus1 smbus2 5 4 hp5082-2080 test ramp voltage bss284 v r 1k 10v 1694-1 f01a + lt 1360 v cc 5v 200 a pull-up = 2.2ma (typ) 200 a (typ) test ramp voltage 0 a v cc 1694-1 f01b 0.5v/ s 0v v thres i pull-up = v r 1k
5 LTC1694-1 sn16941 16941fs applicatio n s i n for m atio n wu u u smbus overview smbus communication protocol employs open-drain drives with resistive or current source pull-ups. this pro- tocol allows multiple devices to drive and monitor the bus without bus contention. the simplicity of resistive or fixed current source pull-ups is offset by the slow rise times resulting when bus capacitance is high. rise times can be improved by using lower pull-up resistor values or higher fixed current source values, but the additional current increases the low state bus voltage, decreasing noise margins. slow rise times can seriously impact data reli- ability, enforcing a maximum practical bus speed well below the established smbus maximum transmission rate. theory of operation the LTC1694-1 overcomes these limitations by providing a 2.2ma pull-up current only during positive bus transi- tions to quickly slew any bus capacitance. therefore, rise time is dramatically improved, especially with maximum smbus loading conditions. the LTC1694-1 has separate but identical circuitry for each smbus output pin. the circuitry consists of a positive edge slew rate detector and a voltage comparator. the 2.2ma pull-up current is only turned on if the voltage on the smbus line voltage is greater than the 0.65v comparator threshold voltage and the positive slew rate of the smbus line is greater than the 0.2v/ m s threshold of the slew rate detector. the pull-up current remains on until the voltage on the smbus line is within 0.5v of v cc and/or the slew rate drops below 0.2v/ m s. selecting the values of r s and r p an external pull-up resistor r p is required in each smbus line to supply a steady state pull-up current if the smbus is at logic zero. this pull-up current is used for slewing the smbus line during the initial portion of the positive transi- tion in order to activate the LTC1694-1 2.2ma pull-up current. using an external r p to supply the steady state pull-up current permits the user the freedom to adjust rise time versus fall time as well as defining the low state logic level (v ol ). for i/o stage protection from esd and high voltage spikes on the smbus, a series resistor r s (figure 2) is sometimes added to the open-drain driver of the bus agents. this is especially common in smbus-controlled smart batteries. both the values of r p and r s must be chosen carefully to meet the low state noise margin and all timing require- ments of the smbus. a discussion of the electrical parameters affected by the values of r s and r p , as well as a general procedure for selecting the values of r s and r p follows. figure 2 v cc r s c bus smbus r on 1694-1 f02 data in data out r p low state noise margin a low value of v ol , the low state logic level, is desired for good noise margin. v ol is calculated as follows: v ol = (r l ? v cc )/(r l + r p ) (1) r l is the series sum of r s and r on , the on-resistance of the open-drain driver. increasing the value of r p decreases the value of v ol . increasing r l increases the value of v ol . initial slew rate the initial slew rate, sr, of the bus is determined by: sr = (v cc C v ol )/(r p ? c bus ) (2) sr must be greater than sr thres , the LTC1694-1 slew rate detector threshold (0.5/ m s max) in order to activate the 2.2ma pull-up current.
6 LTC1694-1 sn16941 16941fs applicatio n s i n for m atio n wu u u smbus rise time rise time of an smbus line is derived using equations 3, 4 and 5. t r = t 1 + t 2 (3) t 1 = C r p ? c bus ? ln[(v thres C v cc )/ (v ilmax C 0.15 C v cc )] (4) if (v ilmax C 0.15) > v thres , then t 1 = 0 m s. t 2 = C r p ? c bus ? ln{[v ihmin + 0.15 C v cc C (r p ? i pull-up )]/[v thres C v cc C (r p ? i pull-up )]} (5) by ignoring the current through r p , a simplified version of equation 3 is obtained: t 2 = (v ihmin + 0.15 C v thres ) ? c bus /i pull-up (6) for an smbus system, v ilmax = 0.8v and v ihmin = 2.1v. for the LTC1694-1, typically v thres = 0.65v and i pull-up = 2.2ma. c bus is the total capacitance of the smbus line. increasing the value of r p increases the rise time. smbus fall time fall time of an smbus line is derived using equation 7: t f = r t ? c bus ? ln{[0.9 ? (r p + r l ) C r l ]/ [(v ilmax C 0.15) ? (r p + r l )/v cc C r l ]} (7) where r t is the parallel equivalent of r p and r l . the rise and fall time calculation for an i 2 c system is as follows. i 2 c bus rise and fall time rise time of an i 2 c line is derived using equation 8. t r = C r p ? c bus ? ln{[v ihmin C v cc C (r p ? i pull-up )]/ [v ilmax C v cc C (r p ? i pull-up )]} (8) fall time of an i 2 c line is derived using equation 9: t f = r t ? c bus ? ln{[(v ihmin /v cc ) ? (r p + r l ) C r l ]/ [(v ilmax /v cc ) ? (r p + r l ) C r l ]} (9) for an i 2 c system with fixed input levels, v ilmax = 1.5v and v ihmin = 3v. for an i 2 c system with v cc related input levels, v ilmax = 0.3v cc and v ihmin = 0.7v cc . c bus is the total capacitance of the i 2 c line. a general procedure for selecting r p and r l is as follows: 1. r l is first selected based on the i/o protection require- ment. generally, an r s of 100 w is sufficient for high voltage spike and esd protection. r on is determined by the size of the open-drain driver, a large driver will have a lower r on . 2. next, the value of r p is determined based on the rise and fall time requirements using equations 3 to 7 (for an smbus system) or 8 and 9 (for an i 2 c system). the value chosen for r p must ensure that both the rise and fall time specifications are met simultaneously. 3. after r p and r l are selected, use equations 1 and 2 to check if the v ol and sr requirements are fulfilled. if sr is too low, decrease the value of r p . if v ol is too high, increase the value of r p . smbus design example given the following conditions and requirements: v cc = 3.3v nom v ol = 0.4v max c bus = 200pf max v ilmax = 0.8v, v ihmin = 2.1v t r = 0.8 m s max, t f = 0.3 m s max if an r s of 500 w is used and the max r on of the driver is 200 w , then r l = 500 + 200 = 700 w . using the max v thres of 0.9v and a min i pull-up of 1ma. using equation 6 to calculate the approximate value of t 2 : t 2 = (2.1 + 0.15 C 0.9) ? [(200 ? 10 C12 )/(1 ? 10 C3 )] = 0.27 m s t 1 = 0.8 C 0.27 = 0.53 m s using equation 4 to find the required r p to meet t r : r p = C t 1 /{c bus ? ln[(v thres C v cc )/ (v ilmax C 0.15 C v cc )]} = 27k r t = (r p ? r l )/(r p + r l )
7 LTC1694-1 sn16941 16941fs applicatio n s i n for m atio n wu u u LTC1694-1 v cc gnd v cc 5v c1 0.1 f smbus1 smbus2 1 2 5 4 LTC1694-1 v cc gnd smbus1 smbus2 5 4 1 2 scl sda device 1 clk in clk out smbus data in data out device n 1694-1 f03 clk in r p2 clk out data in data out r p1 figure 3. paralleling two LTC1694-1 to provide 4.4ma of pull-up current using equations 4 and 5 to check exact value of t r : t r = 0.535 m s + 0.254 m s = 0.79 m s using equation 7 to check t f : t f = 0.222 m s which is less than 0.3 m s. using equation 1 to check v ol : v ol = (3.3 ? 700)/[700 + (27 ? 10 3 )] = 83mv which is less than 0.4v. and using equation 2 to check the initial slew rate: sr = 3.3/[(27 ? 10 3 ) ? (200 ? 10 C12 )] = 0.61v/ m s which is greater than 0.5v/ m s. therefore, the value of r p chosen is 27k. ack data setup time care must be taken in selecting the value of r s (in series with the pull-down driver) to ensure that the data setup time requirement for ack (acknowledge) is fulfilled. an acknowledge is accomplished by the smbus host releas- ing the sda line (pulling high) at the end of the last bit sent and the smbus slave device pulling the sda line low before the rising edge of the ack clock pulse. the LTC1694-1 2.2ma pull-up current is activated when the smbus host releases the sda line, allowing the voltage to rise above the LTC1694-1s comparator thresh- old of 0.65v. if an smbus slave device has a high value of r s , a longer time is required for this smbus slave device to pull sda low before the rising edge of the ack clock pulse. to ensure sufficient data setup time for ack, smbus slave devices with high values of r s , should pull the sda low earlier. typically, a minimum setup time of 1.5 m s is needed for an smbus device with an r s of 700 w and a bus capacitance of 200pf. an alternative is that the smbus slave device can hold scl line low until the sda line reaches a stable state. then, scl can be released to generate the ack clock pulse. connecting multiple LTC1694-1 in parallel the LTC1694-1 is designed to guarantee a maximum smbus rise time of 1 m s with a bus capacitance of 200pf. in some cases where the bus capacitance is higher than 200pf, multiple LTC1694-1s can be connected in parallel to provide a higher pull-up current to meet the rise time requirement. figure 3 shows a typical application with two LTC1694-1s connected in parallel to supply a pull-up current of 4.4ma. information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
8 LTC1694-1 sn16941 16941fs lt/tp 1099 4k ? printed in usa ? linear technology corporation 1999 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com applicatio n s i n for m atio n wu u u v cc = 5v 1 m s/div c ld = 200pf f smbus = 100khz 1694 ta03 v cc = 3.3v 1 m s/div c ld = 200pf f smbus = 100khz 1694 ta04 comparison of smbus waveforms for the LTC1694-1 vs resistor pull-up r pull-up = 15.8k LTC1694-1 1v/div LTC1694-1 1v/div r pull-up = 10.5k related parts part number description comments ltc1380/ltc1393 8-channel/4-channel analog multiplexer with smbus interface low r on and low charge injection ltc1427 10-bit current dac with smbus interface 50 m a full-scale current ltc1623 dual high side switch controller with smbus interface 8 selectable addresses/16 channel capability ltc1663 smbus interface 10-bit rail-to-rail micropower dac dnl < 0.75lsb max, 5-lead sot-23 package ltc1694 smbus accelerator includes dc and ac pull-up current lt1786f smbus-controlled ccfl switching regulator 1.25a, 200khz, floating or grounded lamp configurations package descriptio n u dimensions in inches (millimeters) unless otherwise noted. s5 package 5-lead plastic sot-23 (ltc dwg # 05-08-1633) 1.50 ?1.75 (0.059 ?0.069) 0.35 ?0.55 (0.014 ?0.022) s5 sot-23 0599 0.09 ?0.20 (0.004 ?0.008) (note 2) 2.60 ?3.00 (0.102 ?0.118) note: 1. dimensions are in millimeters 2. dimensions are inclusive of plating 3. dimensions are exclusive of mold flash and metal burr 4. mold flash shall not exceed 0.254mm 5. package eiaj reference is sc-74a (eiaj) 0.35 ?0.50 (0.014 ?0.020) five places (note 2) 0.90 ?1.45 (0.035 ?0.057) 0.90 ?1.30 (0.035 ?0.051) 0.00 ?0.15 (0.00 ?0.006) 0.95 (0.037) ref 2.80 ?3.00 (0.110 ?0.118) (note 3) 1.90 (0.074) ref
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